Principal FPGA Engineer

  • by
Location
Candidate No.
1997492

About this Candidate

DAVRON CV: Candidate 1997492

PRINCIPAL FPGA ENGINEER | FPGA ARCHITECTURE, VERILOG RTL & TIMING ANALYSIS

Core Expertise

  • FPGA architecture and RTL design for high-speed communications and media systems.
  • Verilog development with hands-on timing closure, synthesis, and floorplanning expertise.
  • Hardware bring-up, debugging using JTAG, on-chip instrumentation, and lab validation.
  • System integration of AXI protocols, DDR memory, Ethernet, and high-speed serial links.
  • Technical leadership mentoring distributed teams while overseeing schedules, resources, and deliverables.

Project Background

  • Founded an FPGA-focused startup delivering telecommunications hardware, leading to strategic acquisition.
  • Architected broadcast and professional media systems supporting uncompressed 4K video and audio processing.
  • Directed platform architecture and roadmap for advanced FPGA systems across product lines.
  • Led end-to-end deliveries from concept through deployed hardware with cross-functional engineering teams.
  • Delivered carrier-grade networking and fiber-optic solutions for IP-based communications infrastructure.

Key Skills

  • Verilog | RTL design | Synthesis | Static timing analysis
  • Xilinx FPGAs | Vivado | ChipScope | JTAG
  • AXI Stream | AXI4 Memory-Mapped | AXI-Lite | DDR interfaces
  • High-speed serial | Ethernet | Fiber-optic systems | Carrier networks
  • FPGA verification | Simulation | Testbench development | Hardware bring-up
  • Technical leadership | Project management | Mentorship

Education

  • B.S., Electrical and Electronics Engineering — University of California, Santa Barbara

Why Interview this Candidate?

An experienced Principal FPGA engineer with approximately 18 years of hands-on FPGA architecture, Verilog RTL, timing analysis, and hardware debugging. Founded and led an FPGA startup through acquisition and later directed platform architecture for broadcast and carrier-grade communications systems. Demonstrated ability to manage distributed teams and deliver end-to-end hardware, offering immediate impact in principal or lead FPGA roles.

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